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CVE data sourced from NVD / NIST & public disclosures.

arm

cortex-a72_firmware

6 known vulnerabilities · sorted by CVSS score

CVE-2022-48251
HIGH7.5

The AES instructions on the ARMv8 platform do not have an algorithm that is "intrinsically resistant" to side-channel attacks. NOTE: the vendor reportedly offers the position "while power side channel attacks ... are possible, they are not directly caused by or related to the Arm architecture."

arm / cortex-a53_firmware+9
Network
Published Jan 10, 2023
CVE-2017-5753
MEDIUM5.6

Systems with microprocessors utilizing speculative execution and branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis.

intel / core_i5+999
Local
Published Jan 4, 2018
CVE-2022-23960
MEDIUM5.6

Certain Arm Cortex and Neoverse processors through 2022-03-08 do not properly restrict cache speculation, aka Spectre-BHB. An attacker can leverage the shared branch history in the Branch History Buffer (BHB) to influence mispredicted branches. Then, cache allocation can allow the attacker to obtain sensitive information.

xen / xen+22
Local
Published Mar 13, 2022
CVE-2020-13844
MEDIUM5.5

Arm Armv8-A core implementations utilizing speculative execution past unconditional changes in control flow may allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis, aka "straight-line speculation."

arm / cortex-a32_firmware+8
Local
Published Jun 8, 2020
CVE-2024-10929
MEDIUM5.1

In certain circumstances, an issue in Arm Cortex-A57, Cortex-A72 (revisions before r1p0), Cortex-A73 and Cortex-A75 may allow an adversary to gain a weak form of control over the victim's branch history.

arm / cortex-a57_firmware+3
Local
Published Jan 22, 2025
CVE-2022-25368
MEDIUM4.7

Spectre BHB is a variant of Spectre-v2 in which malicious code uses the shared branch history (stored in the CPU BHB) to influence mispredicted branches in the victim's hardware context. Speculation caused by these mispredicted branches can then potentially be used to cause cache allocation, which can then be used to infer information that should be protected.

amperecomputing / ampere_altra_max_firmware+21
Local
Published Mar 10, 2022